The present invention relates to a semiconductor device made of a group III nitride semiconductor and a method for manufacturing it, and particularly relates to a semiconductor device including a MIS (metal insulator semiconductor) type gate electrode and a method for manufacturing it.
Group III nitride semiconductors, which are typified by nitride gallium (GaN), as a mixed crystal expressed by a general formula of (InxAl1-x)yGa1-yN (wherein x and y are in the ranges of 0≦x≦1, 0≦y≦1, and 0≦x+y≦1), are expected to be applied not only to visible or ultraviolet light emitting elements utilizing a physical characteristic of wide bandgap and a direct transition band structure but also to electronic devices utilizing characteristics of a large breakdown field and high saturation electron velocity.
Particularly, a heterojunction field effect transistor (hereinafter abbreviated it as HFET) utilizing two dimensional electron gas (hereinafter abbreviated it as 2DEG) appearing at the interface between epitaxially grown AlxGa1-xN and GaN can have a high breakdown voltage with a large bandgap of GaN and also a large current with large sheet carrier density and large carrier mobility and is therefore expected as high-power high-frequency device, for which active research and development are being promoted.
For example, as shown in FIG. 18, a GaN layer 3 is formed on a sapphire substrate 1 with an AlN buffer layer 2 interposed and an AlGaN barrier layer 5 with a thickness of 8 nm is formed on the GaN layer 3 with a spacer layer 4 with a thickness of 1.3 nm interposed. A source electrode 6 and a drain electrode 7 are formed with a space left therebetween on the barrier layer 5, and a gate electrode 9 is formed in the region between the source electrode 6 and the drain electrode 7 on the barrier layer 5 with a silicon nitride (SiN) insulating film 8 interposed.
It was reported that the MIS type HFET including an AlGaN/GaN heterojunction according to the conventional example attains a maximum oscillation frequency fmax of 192 GHz by thinning the barrier layer 5 to 8 nm and increasing the composition ratio of Al to 40% (see, for example, M. Higashiwaki, T. Matsui, and T. Mimura, “AlGaN/GaN MIS-FETs with fT of 163 GHz Using Cat-CVD SiN Gate-Insulating and passivation Layers,” IEEE Electron Dev. Lett. Vol. 27 (2006), pp. 16-18, hereinafter referred to it as Non-patent Document 1).
In the above conventional semiconductor device, while high transconductance (gm) is attained by thinning the AlGaN barrier layer 5 to 8 μm, the electron density is increased by forming the silicon nitride insulating film 8 in the region between the source electrode 6 and the drain electrode 7 on the barrier layer 5 for modulating the potential in the vicinity of the 2DEG channel. This reduces the source resistance to attain higher high frequency characteristics.
The above conventional semiconductor device composed of a MIS type HFET, however, involves the following problems.
As described above, enhancement of the transconductance and reduction of the source resistance must be achieved for attaining high frequency characteristics. When the barrier layer 5 is thinned for increasing the transconductance, however, the electron density in the channel from the gate electrode 9 to the source electrode 6 reduces to increase the parasitic resistance including the source resistance. Even though the source resistance can be reduced by shortening the distance between the source electrode 6 and the gate electrode 9, the process technology for forming electrodes limits such shortening of the distance therebetween.
This means that the source resistance is reduced insufficiently in the conventional semiconductor device.
Further, in order to implement enhancement of the transconductance, the inventors have conducted various examinations into structures in which a cap layer for reducing the source resistance is provided between the source resistance and the barrier layer. The barrier layer is desired to be thin as far as possible for enhancing the transconductance of a transistor. Accordingly, the cap layer formed on the barrier layer may have a structure in which an opening is formed for exposing the barrier layer and a part of the barrier layer which is exposed through the opening, that is, a part of the barrier layer which remains after recess etching is thinned.
However, the inventors have found that thinning the part of the barrier layer which is exposed through the opening reduces especially the electron density in the channel region present below the region from the end on the source electrode side to the gate electrode of the opening and the electron density in the channel region present below the region from the end on the drain electrode side to the gate electrode thereof.